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Hardware Specification
7.7
HIGH-SPEED COMMUNICATION BOARDS
For high-speed emulator communication with a target ( Section 2.4.2 “High-Speed
Communication” ), use the following boards:
? High-Speed Driver Board
? High-Speed Receiver Board
7.7.1
High-Speed Driver Board
The high-speed driver board consists of two separate multipoint LVDS (Low Voltage
Differential Signal) transmitters and receivers for clock and data. Multipoint LVDS
requires 100 ohm terminations at each driver output and receiver input, per the
standard, and multipoint configurations type 2 receivers are used, as these are
intended for control signals or where fail-safe provisions are needed. Even though the
standard allows for any combination of drivers, receivers and/or transceivers of up to
32 on the line, only two will be used. The driver board has a port expansion which is
controlled by an I 2 C? interface for sending and receiving status information to the
emulator. The high-speed driver board assembly is inserted into the emulator pod via
the card guide.
Note:
Data rates up to 40 MIPS are possible.
FIGURE 7-3:
DUAL 8-PIN PINOUT
J3
J2
1
3 5 7
1
3 5 7
Bottom of
Receiver Board
2
4 6
8
2
4 6
8
J3 Pinout
Pin
1
2
3
4
Name
DATAEN+
DATAEN–
CLKEN+
USPID+
Function
Std Data Enable +
Std Data Enable –
Std Clock Enable +
*Serial Data +
Pin
5
6
7
8
Name
USPID–
CLKEN–
USPIC+
USPIC–
Function
*Serial Data –
Std Clock Enable –
*Serial Clock +
*Serial Clock –
* future feature
J2 Pinout
Pin
1
2
3
4
Name
LVC+
LVD–
LVC+
Vdd
Function
LV Std Data +
LV Std Data –
LV Std Clock +
Power
Pin
5
6
7
8
Name
GND
LVC–
Vdd_TGT
Vpp_TGT
Function
Ground
LV Std Clock –
Vdd on target
Vpp on target
? 2006 Microchip Technology Inc.
DS51616A-page 45
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